An AC surface discharge type plasma display panel (hereinafter called “PDP”) which is typical as the AC type is constituted by arranging a front plate containing a glass substrate formed by disposing a scan electrode and a sustain electrode which carry out surface discharge and a back plate containing a glass substrate formed by disposing data electrodes oppositely in parallel so that both electrodes set up a matrix and a discharge space is formed in a gap, and by sealing the perimeter portion with sealing materials such as glass frit, etc. Between both substrates of the front plate and the back plate, discharge cells divided by bulkheads are provided, and in a cell space between these bulkheads, a phosphor layer is formed. In PDP of such configuration, ultraviolet rays are generated by gas discharge, and with this ultraviolet ray, phosphors of each color of red (R), green (G) and blue (B) are excited to emit light, thereby achieving color display.
In this kind of plasma display apparatus, various electric power reduction techniques are proposed to reduce the electric power consumption.
As one of the techniques to reduce electric power consumption, there disclosed is a so-called power recovery circuit, in consideration to the fact that PDP is a capacitive load. By the power recovery circuit, the inductor and PDP capacitive load are LC-resonated by a resonance circuit in which an inductor is included as a component element, the electric power accumulated in the PDP capacitive load is recovered to a capacitor for electric power recovery, and the recovered electric power is reused for driving PDP (see, for example, patent document 1).
In this technique, for example, the electric power recovered from PDP is reused for applying sustain pulse voltage to the scan electrode and the sustain electrode in a sustain period to reduce the electric power consumed during the sustain period, and thereby reduction of electric power consumption can be achieved.
That is, in the sustain pulse generation circuit, a resonance circuit equipped with an inductor, that is, an electric recovery circuit is installed. By this, electric power accumulated in the PDP capacitive load (capacitive load generated in the scan electrode) is recovered, the recovered electric power is reused as driving electric power of the scan electrode, and electric power consumption is reduced. In addition, in the sustain pulse generation circuit, a power recovery circuit is installed. By this, electric power accumulated in PDP capacitive load (capacitive load generated in the sustain electrode) is recovered, and the recovered electric power is reused as driving power of the sustain electrode and electric power consumption is reduced.
FIG. 25 is a circuit diagram of a scan electrode drive circuit and sustain electrode drive circuit equipped with such a power recovery circuit. In the figure, a scan electrode drive circuit 5 includes a sustain pulse generation circuit 51, a reset waveform generation circuit 52, and a scan pulse generation circuit 53.
The sustain pulse generation circuit 51 includes a power recovery circuit which has a coil L1, a recovery capacitor C1, switching elements S1, S2, and reverse blocking diodes D1, D2, and a voltage clamp circuit which has switching elements S5, S6 and a constant voltage power supply V1 of a voltage Vsus. The power recovery circuit causes LC-resonance between the capacitive load of PDP 10 and the coil L1 by using the coil L1 as an inductance element, and recovers and supplies electric power. During recovery of electric power, electric power accumulated in capacitive load generated in the scan electrode is transferred to the recovery capacitor C1 via the current reverse blocking diode D2 and switching element S2. During supply of electric power, electric power accumulated in recovery capacitor C1 is transferred to PDP 10 via the switching element S1 and reverse blocking diode D1. In this way, the scan electrode of PDP is driven during the sustain period. Consequently, because in the power recovery circuit, in the sustain period, the scan electrode is driven by LC resonance without supplying electric power from the power supply, theoretically, electric power consumption becomes zero.
In FIG. 25, in order to electrically separate the sustain pulse generation circuit 51 from the reset waveform generation circuit 52, switching elements S9 and S10 are inserted in a main discharge pah X between the sustain pulse generation circuit 51 and the reset waveform generation circuit 52 in series and in such a manner that body diodes of each of them are directed in opposite directions. Hereinafter this kind of connection with diodes directed in opposite directions is called “back-to-back connection.” By achieving this kind of configuration, simultaneously turning off switching elements S9 and S10 can shut off both currents including current that flows from the sustain pulse generation circuit 51 to the reset waveform generation circuit 52 and current that flows from the reset waveform generation circuit 52 to the sustain pulse generation circuit 51. Thus, it becomes possible to electrically separate the sustain pulse generation circuit 51 from the reset waveform generation circuit 52.
This is intended to prevent influence of the constant-voltage power supply V1 of the sustain pulse generation circuit 51 with lower potential from being exerted when electric power is supplied from the constant-voltage power supply V2 of the reset waveform generation circuit 52, and to prevent influence of potential higher than that, that is, grounding potential (hereinafter simply written “GND”) of a clamp section of the sustain pulse generation circuit 51 when electric power is supplied from constant-voltage power supply V3 of negative potential in the reset waveform generation circuit 52.
In addition, since large current as large as several hundreds of ampere may flow instantaneously when PDP 10 is driven, in a drive circuit of PDP 10, a large number of MOSFETs are installed in parallel to form switching elements to proof such large current. In switching elements S9 and S10 inserted in series between the sustain pulse generation circuit 51 and the reset waveform generation circuit 52 in order to electrically separate the sustain pulse generation circuit 51 from the main discharge path, a large number of MOSFETs are installed to form switching elements in the same manner.
Impedance generated on the main discharge path by the switching elements S9 and S10 consumes ineffective electric power which does not contribute to light emission by the current that flows when the sustain pulse generation circuit 51 drives a scan electrode and generates unrequired joule heat associated with the electric power consumption. In particular, in a power recovery circuit, electric power consumption is cut down by recovering electric power accumulated in capacitive load of PDP 10 and reusing it, and thus in the event electric power is ineffectively consumed by such impedance, the electric power recovery ratio is degraded and electric power consumption reduction effect is lowered.
In order to solve this problem, a technique to install switching elements in a voltage clamp circuit of the sustain pulse generation circuit 51 in place of switching elements S9 and S10 is proposed (see, for example, patent document 2).
FIG. 26 is a circuit diagram of a scan electrode drive circuit 521 with switching elements S101 and S102 installed in a voltage clamp circuit of sustain pulse generation circuit 51 and a sustain electrode drive circuit 6.
In FIG. 26, in place of switching elements S9 and S10 in FIG. 25, switching elements S101 and S102 are installed to a voltage clamp circuit of the sustain pulse generation circuit 5121. And switching element S101 is disposed to achieve back-to-back connection with the switching element S5 and the switching element 102 is disposed to achieve back-to-back connection with the switching element S6.
Under this configuration, turning off switching element S5 and switching element S101 simultaneously can electrically separate the constant-voltage power supply V1 from the main discharge path, and turning off switching element S6 and switching element S102 simultaneously can electrically separate GND of the voltage clamp circuit from the main discharge path.
Patent document 1: JP 07-109542, A
Patent document 2: JP 2005-70787, A